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{
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{
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{
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{
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{
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{
"fixture": "baselines/triton/fixtures/sha256-55bytes/vector.bench.toml",
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{
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{
"fixture": "baselines/triton/fixtures/sha256-carry/vector.bench.toml",
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{
"fixture": "baselines/triton/fixtures/sha256-empty/vector.bench.toml",
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{
"fixture": "baselines/triton/fixtures/sha256-two-blocks/vector.bench.toml",
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{
"fixture": "baselines/triton/fixtures/symmetric/vector.bench.toml",
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{
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{
"fixture": "baselines/triton/fixtures/tensor-boundaries/cross-high.bench.toml",
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{
"fixture": "baselines/triton/fixtures/tensor-boundaries/descending.bench.toml",
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{
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{
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},
{
"fixture": "baselines/triton/fixtures/tensor-boundaries/threshold-reversed.bench.toml",
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},
{
"fixture": "baselines/triton/fixtures/tensor-boundaries/threshold.bench.toml",
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"delta": 0,
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"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/tensor-matvec/vector.bench.toml",
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"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/timelock-16/vector.bench.toml",
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"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/timelock-17/vector.bench.toml",
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"hand_before": 112,
"hand_after": 112,
"delta": -387,
"ratio": 0.8216589861751152,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/tip5/vector.bench.toml",
"before": 42,
"after": 42,
"hand_before": 36,
"hand_after": 36,
"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/trinity-ascending/vector.bench.toml",
"before": 138220,
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"delta": -8578,
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"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/trinity-descending/vector.bench.toml",
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"after": 129576,
"hand_before": 21332,
"hand_after": 21332,
"delta": -8578,
"ratio": 0.9379098686972509,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/u32/vector.bench.toml",
"before": 31,
"after": 31,
"hand_before": 18,
"hand_after": 18,
"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/utxo/vector.bench.toml",
"before": 11,
"after": 11,
"hand_before": 9,
"hand_after": 9,
"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/fixtures/xfield-inverse/vector.bench.toml",
"before": 20,
"after": 20,
"hand_before": 11,
"hand_after": 11,
"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
},
{
"fixture": "baselines/triton/reference/arithmetic.bench.toml",
"before": 11,
"after": 11,
"hand_before": 7,
"hand_after": 7,
"delta": 0,
"ratio": 1.0,
"self_hash_rebound": false
}
]
},
"cli_proofs": {
"schema_version": 1,
"binary": "/Users/master/cyber/trisha/target/release/trisha",
"binary_sha256": "8ecd32d661ebefbd111ef8e9e7165d587d3beb33aa79a52f62c68175de31bc44",
"all_checks_passed": true,
"fresh_proofs": 6,
"verified_proofs": 6,
"wrong_output_rejections": 6,
"counterexamples": [
{
"case": "deep",
"profile": "debug",
"source": "program alias\nuse vm.io.mem\nfn main() {\nlet words: [Field;20]=[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20]\nmem.write(2147483648,999)\npub_write(words[0])\npub_write(mem.read(2147483648))\n}",
"expected": [
1,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"debug"
],
"exit_code": 0,
"stdout": "1\n20\n",
"stderr": "Backend: cpu\nExecuting deep (159 ops)...\nExecuted in 158 cycles\n"
},
{
"case": "deep",
"profile": "release",
"source": "program alias\nuse vm.io.mem\nfn main() {\nlet words: [Field;20]=[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20]\nmem.write(2147483648,999)\npub_write(words[0])\npub_write(mem.read(2147483648))\n}",
"expected": [
1,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"release"
],
"exit_code": 0,
"stdout": "1\n20\n",
"stderr": "Backend: cpu\nExecuting deep (159 ops)...\nExecuted in 158 cycles\n"
},
{
"case": "cleanup",
"profile": "debug",
"source": "program alias\nuse vm.io.mem\nfn pair(x:Field)->(Field,Field) { (x,x+1) }\nfn main() { mem.write(1073741824,999)\nlet(x,y)=pair(7)\npub_write(x)\npub_write(y)\npub_write(mem.read(1073741824))\n}",
"expected": [
7,
8,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"debug"
],
"exit_code": 0,
"stdout": "7\n8\n8\n",
"stderr": "Backend: cpu\nExecuting cleanup (39 ops)...\nExecuted in 36 cycles\n"
},
{
"case": "cleanup",
"profile": "release",
"source": "program alias\nuse vm.io.mem\nfn pair(x:Field)->(Field,Field) { (x,x+1) }\nfn main() { mem.write(1073741824,999)\nlet(x,y)=pair(7)\npub_write(x)\npub_write(y)\npub_write(mem.read(1073741824))\n}",
"expected": [
7,
8,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"release"
],
"exit_code": 0,
"stdout": "7\n8\n8\n",
"stderr": "Backend: cpu\nExecuting cleanup (39 ops)...\nExecuted in 36 cycles\n"
},
{
"case": "asm",
"profile": "debug",
"source": "program alias\nuse vm.io.mem\nfn main() { let sentinel = pub_read()\nmem.write(1073741824,999)\nasm { push 1073741824 read_mem 1 pop 1 write_io 1 }\npub_write(sentinel)\npub_write(mem.read(1073741824))\n}",
"expected": [
999,
97,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/asm.tri",
"--target",
"triton",
"--profile",
"debug",
"--input-values",
"97"
],
"exit_code": 0,
"stdout": "97\n97\n97\n",
"stderr": "Backend: cpu\nExecuting asm (24 ops)...\nExecuted in 26 cycles\n"
},
{
"case": "asm",
"profile": "release",
"source": "program alias\nuse vm.io.mem\nfn main() { let sentinel = pub_read()\nmem.write(1073741824,999)\nasm { push 1073741824 read_mem 1 pop 1 write_io 1 }\npub_write(sentinel)\npub_write(mem.read(1073741824))\n}",
"expected": [
999,
97,
999
],
"command": [
"/tmp/cyber-ram-repair/trisha-before",
"run",
"/tmp/cyber-ram-repair/asm.tri",
"--target",
"triton",
"--profile",
"release",
"--input-values",
"97"
],
"exit_code": 0,
"stdout": "97\n97\n97\n",
"stderr": "Backend: cpu\nExecuting asm (24 ops)...\nExecuted in 26 cycles\n"
}
],
"commands": [
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"run",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"debug"
],
"exit_code": 0,
"seconds": 0.011531083000591025,
"stdout": "1\n999\n",
"stderr": "Backend: cpu\nExecuting deep (146 ops)...\nExecuted in 250 cycles\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"prove",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"debug",
"--output",
"/tmp/cyber-ram-repair/deep-debug.proof.toml"
],
"exit_code": 0,
"seconds": 0.47810199999366887,
"stdout": "1\n999\n",
"stderr": "Backend: cpu\nProving deep (146 ops)...\nProof generated (250 cycles, padded height 2048)\nProof written to /tmp/cyber-ram-repair/deep-debug.proof.toml (464 ms, 250 cycles)\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/deep-debug.proof.toml"
],
"exit_code": 0,
"seconds": 0.017641541999182664,
"stdout": "Verification: PASS\n",
"stderr": "Backend: cpu\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/deep-debug-wrong-output.proof.toml"
],
"exit_code": 1,
"seconds": 0.01261745800729841,
"stdout": "Verification: FAIL\n",
"stderr": "Backend: cpu\n",
"expected_success": false
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"run",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"release"
],
"exit_code": 0,
"seconds": 0.010748417000286281,
"stdout": "1\n999\n",
"stderr": "Backend: cpu\nExecuting deep (146 ops)...\nExecuted in 250 cycles\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"prove",
"/tmp/cyber-ram-repair/deep.tri",
"--target",
"triton",
"--profile",
"release",
"--output",
"/tmp/cyber-ram-repair/deep-release.proof.toml"
],
"exit_code": 0,
"seconds": 0.504465291989618,
"stdout": "1\n999\n",
"stderr": "Backend: cpu\nProving deep (146 ops)...\nProof generated (250 cycles, padded height 2048)\nProof written to /tmp/cyber-ram-repair/deep-release.proof.toml (490 ms, 250 cycles)\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/deep-release.proof.toml"
],
"exit_code": 0,
"seconds": 0.01774579098855611,
"stdout": "Verification: PASS\n",
"stderr": "Backend: cpu\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/deep-release-wrong-output.proof.toml"
],
"exit_code": 1,
"seconds": 0.012710209004580975,
"stdout": "Verification: FAIL\n",
"stderr": "Backend: cpu\n",
"expected_success": false
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"run",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"debug"
],
"exit_code": 0,
"seconds": 0.010929333002422936,
"stdout": "7\n8\n999\n",
"stderr": "Backend: cpu\nExecuting cleanup (30 ops)...\nExecuted in 27 cycles\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"prove",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"debug",
"--output",
"/tmp/cyber-ram-repair/cleanup-debug.proof.toml"
],
"exit_code": 0,
"seconds": 0.16492670800653286,
"stdout": "7\n8\n999\n",
"stderr": "Backend: cpu\nProving cleanup (30 ops)...\nProof generated (27 cycles, padded height 512)\nProof written to /tmp/cyber-ram-repair/cleanup-debug.proof.toml (152 ms, 27 cycles)\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/cleanup-debug.proof.toml"
],
"exit_code": 0,
"seconds": 0.01583679199393373,
"stdout": "Verification: PASS\n",
"stderr": "Backend: cpu\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/cleanup-debug-wrong-output.proof.toml"
],
"exit_code": 1,
"seconds": 0.012250792002305388,
"stdout": "Verification: FAIL\n",
"stderr": "Backend: cpu\n",
"expected_success": false
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"run",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"release"
],
"exit_code": 0,
"seconds": 0.010617874999297783,
"stdout": "7\n8\n999\n",
"stderr": "Backend: cpu\nExecuting cleanup (30 ops)...\nExecuted in 27 cycles\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"prove",
"/tmp/cyber-ram-repair/cleanup.tri",
"--target",
"triton",
"--profile",
"release",
"--output",
"/tmp/cyber-ram-repair/cleanup-release.proof.toml"
],
"exit_code": 0,
"seconds": 0.18267833300342318,
"stdout": "7\n8\n999\n",
"stderr": "Backend: cpu\nProving cleanup (30 ops)...\nProof generated (27 cycles, padded height 512)\nProof written to /tmp/cyber-ram-repair/cleanup-release.proof.toml (170 ms, 27 cycles)\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/cleanup-release.proof.toml"
],
"exit_code": 0,
"seconds": 0.015954665999743156,
"stdout": "Verification: PASS\n",
"stderr": "Backend: cpu\n",
"expected_success": true
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"verify",
"/tmp/cyber-ram-repair/cleanup-release-wrong-output.proof.toml"
],
"exit_code": 1,
"seconds": 0.012299459005589597,
"stdout": "Verification: FAIL\n",
"stderr": "Backend: cpu\n",
"expected_success": false
},
{
"command": [
"/Users/master/cyber/trisha/target/release/trisha",
"run",
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